Remedial branching teaching system

ABSTRACT

A system for interpreting input responses, such as student answers, and effecting appropriate output responses wherein the system is operative in a plurality of modes for interpreting input responses, for example, as correct, incorrect, or nearly correct, with the appropriate output response being effected so that a student progresses through programmed instructional material according to answers given at various points in the instructional material either in a primary or remedial manner.

United States Patent 1 1 1111 3,715,811

Thompson et al. 1 1 Feb. 13, 1973 54] REMEDIAL BRANCHING TEACHING3,504,447 4/1970 Brudner ..35/9 B SYSTEM 3,504,446 4/1970 Brunei] et31......

, 3,577,657 5 1971 Pluml et a]. ..35 48 R [75] Inventors: Francis T.Thompson, Murrysville; y

shan Pittsburgh both of Primary Examiner-Robert W. Michell [73]Assignee: Westinghouse Electric Corporation, Assistant Examiner-J. H.Wolff Pittsburgh, Pa. AttorneyF. H. Henson, A. S. Oddi and C. F. Renz[22] Filed: Oct. 13, 1970 [57] ABSTRACT 21 A LN ,359

[ 1 PP 80 A system for interpreting mput responses, such as studentanswers, and effecting appropriate output [52] US. Cl ..35/48, 35/9 Aresponses herein the system is operative in a plurali- [5 l i hit. Cl.ty of modes for interpreting input r esponses for exam- [58] Field ofSearch ..35/9 A, 9 B, 48 R l as correct, incorrect, or nearly correct,with the appropriate output response being effected so that a [56]References Cled student progresses through programmed instructionalUNITED STATES PATENTS materiai according to answers given at vario ispoints in the instructional material elther m a primary or 3,141,2437/1964 Chapman et al ..35/9 A remedial manner. 3,408,749 11/1968 Brudner..35/9 A 3,501,851 3/1970 Price, Jr. et a1 ..35/9 A 15 Claims, 10Drawing Figures ALPH A-NUM ERIC I. CONTROL CODE 81 KEYBOARD CORRECTANSWER i L CODE MEMORY PROJECTOR 4 3 2.LOGIC CONTROLS T CODER 1 IINCORRECT 1 ENTRY COMPARATOR (SYMBOL MODE OMITTED ENTRY K01 7 6 i i iINCORRECT ENTRY 1. ANSWER DETECTION LOGIC A E N MODE) E 2.TRACK aDIRECTION TRACK DIRECTION SELECTION LOGIC PATENTEUFEB 13 I975 3. 7 15.81 l SHEET 10F 4 ALPHA-NUMERIC I. CONTROL CODE 8.

KEYBOARD CORRECT ANSWER i L CODE MEMoRY PROJECTOR 4 3 2.LOGIC CONTROLS kk coDER INCORRECT ENTRY COMPARATOR (SYMBOL MODE)\ OMITTED ENTRY K,K| 7 6INCORRECT ENTRY F|(3' I. ANSWER DETECTION LOGIC (PATTERN MODE I gF2.TRACK a DIRECTION TRAcK D|REcT|oN SELECTION LOGIC FIG. 2.

A B D E ENTER 5 s a 9 so F e 1 J F l G .3.

K L N 0 o P u S T CLEAR INVENTORS Froncls T. Thompson 8 Shun C. Sun.

v w Y z ATT PATENTEDFE 1 Y I 3.715 811 SHEET 3 OF 4 BITI (SYMBOL MODE)FFI INCORRECT ENTRY N4 (SYMBOL MODE) T; o |NcOR ENTRY BITHPATTERN MODE)FLOF; '5 INCORRECT mum/ W ENTRY (PATTERN MODE) 7 E N HQ 5 7 N2 (F|G.6)

BIT9

FROM N4(FIG.5

INCOR ENTRY RESET BIT BITS TRACK-X 2 3\ 2 3 BITB T BITS Nl'l' NIG Y H y(2 y (2 \r lNCOR E'NTR'Y TRACK Y BIT T N22 I Nzl N23 N25 0MlSS|0N- m ICORRANS INCOR E'N'T'mc N24 O F|G.,7.

B|T7 CORRANS CORR NUMBER ENTRY PATENTEDFEB 1 3 1915 v 7 l 5. 811

' sum w 4.

' |NcoR ENTRY NEARLY CORR ANS OMISSION ACCEPT OMISSION NEARLY CORR ANSS%: E i 'FIG.8.

N3! WM N33 NEARLY CORR ANS j NcoR ANS QB INCOR ENTR L B|T 2=.P F|G.9

-34 BIT l o PAIR D |R PAIR om N35 PAIRQ i R N30 N32 w; N 0 OUT N37NEARLY CORR AN5 2 BTT 6| BlT2 BIT low...

BITI l BITE GO TRACK x BIT? M INCOR ENTRY so TRACK Y INCOR ENTRYREMEDIAL BRANCI'IING TEACHING SYSTEM CROSS REFERENCE TO RELATEDAPPLICATIONS This application is related to application Ser. No. 80360by Francis T. Thompson entitled Dual Answer Teaching Mode System filedconcurrently herewith and assigned to the same assignee.

BACKGROUND OF THE INVENTION 1. Field of the Invention The presentinvention relates to teaching systems and, more particularly, toteaching systems for interpreting input responses and effectingappropriate output responses for controlling the manner of presentinginstructional material.

2. Discussion of the Prior Art A remedial branching type of teachingsystem is taught in US. Pat. No. 3,408,749 by H. J. Brudner wherein anaudio-visual film format is employed. In this system a plurality ofpicture track comprising a number of frames are provided on the filmwith each picture track having a corresponding audio track and codetrack including control and correct answer information encoded thereon.A student is presented with a primary audio-visual teaching sequence andasked a question (or questions) at the end of this sequence with thefilm being stopped at the question asking frame of the sequence. Thestudent then enters his answer to the question with his answer beingcompared with the correct answer information encoded on the film andstored in the teaching system. If the students answer is interpreted tobe correct according to the answering mode of the system, the film isadvanced to the next primary teaching sequence. However, if the studentsanswer is interpreted as being incorrect the film is indexed to aremedial track wherein the student is presented with material intendedto enable him to answer the previously incorrectly answered question.After the remedial sequence the original primary sequence may again bepresented with the student again having an opportunity to answer theoriginal question. If the student then answers the question correctly hemay then proceed to the next primary teaching sequence.

In the cross-referenced copending application a dual mode answeringsystem is described wherein student answers may be compared with storedcorrect answer information according to two different answering modes,namely, a commutative mode and a non-commutative mode. In thecommutative mode the order of student entry is unimportant. The studentanswer AB is equivalent to the answer BA and both are consideredidentical for this answer mode. The non-commutative mode requires anexact correspondence between the stored correct answer and the studentresponse character for character in the correct order. In both answeringmodes a correct or incorrect interpretation is given to the studentresponse. Particularly in the commutative mode considerable ambiguitymay exist as to whether the student response is clearly correct orclearly incorrect. This ambiguity may be minimized somewhat by requiringthat the student provide the correct number of character entries for hisanswer to be interpreted as correct such as taught in US. Pat. No.3,504,39

However, in addition to providing operation in the commutative andnon-commutative modes, it would be highly desirable if student answerscould be interpreted according to a variety of criteria designated toselect an appropriate primary or remedial teaching branch sequence forthe student. Additionally, it would be advantageous if separate outputresponses were given for student entries interpreted to be correct orincorrect or partially correct. According to such an answer interpretingscheme a large degree of flexibility would be provided wherein multipleprimary and remedial teaching branches may be selected in accordancewith the student answer so as to enhance the students learning process.Students would thus be enabled to progress through a teaching format aspresented on a multitrack film in a wide variety of branching routesvarying from student to student with various students selecting variousbranches of instructional sequences according to their individualizedresponses to the instructional material.

SUMMARY OF THE INVENTION Broadly, the present invention provides aremedial branching type of teaching system wherein input responses areinterpreted according to the particular mode of operation and outputresponses are effected accordingly.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a simplified function blockdiagram of the teaching system embodying the present invention;

FIG. 2 is a schematic representation of a multitrack film as employedherein;

FIG. 3 is a representation of an alpha-numeric keyboard arrangement usedherein;

FIG. 4 is a functional block diagram of the system of the presentinvention;

FIG. 5 is a logic block diagram of the incorrect entry memory functionblock ML of FIG. 4;

FIG. 6 is a logic block diagram of the multiple medial track numbergenerating logic functional block GL of FIG. 4;

FIG. 7 is a logic block diagram of the correct/incorrect answerdetecting logic functional block DL2 of FIG. 4;

FIG. 8 is a logic block diagram of the nearly correct answer decisionlogic functional block DL3 of FIG. 4;

FIG. 9 is a logic block diagram of the remedial direction selectionlogic function block SL1 of FIG. 4; and

FIG. 10 is a logic block diagram of the remedial track selection logicfunctional block SL2 of FIG. 4.

DESCRIPTION OF THE PREFERRED EMBODIMENT Referring to FIG. I a simplifiedfunctional block diagram of the present teaching system is shown. Thissystem includes a projector l operative with a multitrack film such asschematically represented in FIG. 2. The film of FIG. 2 is shown toinclude six picture tracks cumulatively designated X-Y; six audio tracksAT correlated respectively to the six picture tracks XY; and six codetracks CT correlated respectively with the picture and audio tracks. Thefilm may conveniently be disposed within a film cartridge with the filmcapable of traveling in both directions, that is, out of (OUT direction)and into (IN direction) the cartridge.

The projector l is operative with the film to present the audio andvisual information contained in the respective tracks thereof in eitherof the designated OUT or IN directions under the control of the codedinformation on the code track and the various logic circuits asdesignated in FIG. 1. The control tracks CT respectively include controlinformation in the form of serial binary bits which establish variousoperating modes within the system of FIG. 1. Also included in therespective control tracks is correct answer information in the form ofserial binary bits which is to be stored in the functional block 2 ofFIG. 1 in a manner according to the mode of operation selected by thecoded control information.

In a typical sequence of operation assume that the projector 1 isoperating on picture track PTl of FIG. 2 and the corresponding audio andcontrol tracks and the film is being driven in the OUT direction so thata primary teaching sequence PLl from track X1, Y1 is being presented.

The functional block 2 includes a control code and a correct answer codememory and logic controls and is responsive to the code trackcorresponding to the picture track X1, Y1 under consideration.Information included on the control track defines the particularanswering mode to be employed for the lesson sequence underconsideration. In the copending cross-referenced application a dual modeanswer system is disclosed capable of use in the functional block 2which permits operation in the commutative mode (hereinafter the PATTERNmode) and the non-commutative mode (hereinafter the SYMBOL mode). Theparticular implementation of the block 2 is fully described in thecopending application and the significance of the PAT- TERN and SYMBOLmodes will be discussed in further detail.

Addition to establishing the answering mode in the functional block 2,the control information includes correct answer information for theparticular teaching sequence which is stored in the correct answer codememory portion of the functional block 2-according to either the PATTERNor SYMBOL mode of answering.

When the lesson sequence PLl reaches the last frame thereof Q1 (definedas the question frame) the projector 1 is stopped under the feedbackcontrol from the functional block 2 to the projector 1 in response tocoded information designating the question frame. A question (orquestions) is presented to the student and the display maintained. Thestudent response entry to the question is entered via an alpha-numerickeyboard 3.

The alpha-numeric keyboard 3 may have a configuration such as shown inFIG. 3 comprising a five by five matrix of characters. With such akeyboard 25 individual entries may be made by a student. However, thiscorresponds to I a total of 35 characters due to duplications on of thekeys.

Once the student has completed his response he may either enter hisanswer for comparison with the stored correct answer in the functionalblock 2 by depressing the ENTER/GO button or may depress the CLEARbutton which causes his entry to be cleared so that he may answer thequestion again according to his satisfaction. When the student depressesthe ENTERIGO button the output of alpha-numeric is compared with thecorrect answer information stored in the functional block 2 according tothe SYMBOL or PATTERN mode selected for the lesson sequence.

The compared output of the comparator 5 is applied to functional block 2and to a functional block-.6 which comprises the subject matter of thepresent invention and functionally includes answer detecting logic, andtrack and direction selection logic. The inputs to the functional block6 in addition to the comparator 5 are a control input from thefunctional block 2 an incorrect entry (PATTERN mode) input and anomitted entry input from functional block 2 and an incorrect entry"(SYMBOL mode) input from coder 4. The manner in which the functionalblock 6 operates in response to various inputs will be discussed belowwith reference to FIG. 4.

According to the inputs to the functional block 6 the particular trackof the film is selected and also the IN or OUT direction of that trackis also selected. These track and direction inputs are provided to theprojector l to establish which track will next be presented in theparticular selected direction. An interface logic 7 is also providedwhich receives an input from the alphanumeric keyboard 3 and also fromthe functional block 2 and in response thereto provides an input to theprojector l to energize the projector l to proceed to the next lessonsequence as defined by the track and direction output of the functionalblock 6.

If, for example, the student entry was incorrect the track output of thefunctional block 6 may define the track X2, Y2 providing the remediallesson RLl. The direction defined for this track would be in the INdirection. The projector 1 would thus be indexed to this track andestablished to be driven in the defined IN direction. Remedial track RLlwould then be displayed by the projector l with corresponding audio fromthe audio track under the control of the corresponding control track. Atthe end of the remedial track RLl the projector may index to thebeginning of the primary lesson PLl which would be replayed and the samequestion in the question frame Q1 presented for the student to againattempt to answer. An answer interpreted as being correct would resultin the film being advanced in the OUT direction to a second primarylesson PL2 on the track X1, Y1 until the question frame Q2 was reachedwhen the projector 1 would be stopped for the presentation of a question(or questions) to the student for his answer. The system would similarlyfunction in subsequent cycles so that according to the student responsevarious branches of the film format would be selected with appropriateteaching material being presented to the student in accordance with hisresponses.

PREDEFINED MODES OF OPERATION Before proceeding with the detaileddiscussion of FIGS. 4-10 it is necessary to define various operationalconditions within the overall framework of the system of FIG. 1 foroperation in the SYMBOL and PAT- TERN modes. The manner in which theSYMBOL and PATTERN modes are effected within the functional block 2 isfully described in the cross-indexed copending application and referenceis made thereto. The following correct response requirements, answercategories and projector responses are defined with reference to thesystem of FIG. 1 established for operation in either the SYMBOL or thePATTERN mode and with the respective sub-modes of operation beingspecifically set out. I. SYMBOL MODE NON-COMMUTATIVE a. Correct ResponseRequirements The characters sequentially entered by the student as hisanswer must be in the correct sequence and the correct number of entriesmust be made. b. Answer Categories A student answer is eithercategorized as correct or incorrect. The capability of distinguishingbetween different types of incorrect answers is not required. 0. SystemResponses If a student answer. is correct, the system will proceed withthe film being driven in the same direction as the previous lesson onthe same track. If the answer is incorrect, the system will index thefilm to a remedial track (x =1, 2, 3. as specified by the code on thecode track and will proceed in the remedial direction as specified bythe code. II. PATTERN MODE COMMUTATIVE a. Correct Response RequirementsThe individual character inputs of the student response may be enteredin any sequence. However, the student entry must include the same numberof characters as the correct answer. b. Answer Categories 1. Completelycorrect All of the characters specified in a correct answer are enteredby the student the correct number of times.

2. Nearly correct no incorrect entries and acceptable omissions.

No incorrect entry was made by the student but not greater than aspecified number of correct entries were omitted. By specifying that noomitted entries will be acceptable this type of response may be deletedwhich is equivalent to requiring a completely correct response as in (II3. No incorrect entries and not acceptable omissions.

No incorrect entry was made but a greater than the specified number ofcorrect entries were omitted.

4. Incorrect entry One or more incorrect entries were made by thestudent.

5. Allowable number or errors with equal treatment of errors andomissions.

This is a special case used only in the single remedial track mode asdefined below in (II (c) c. Projector Responses 1. Completely correct 7If the answer is completely correct the projector will proceed in thesame direction as the previous lesson on the same track.

2. Single remedial track mode a. Partially correct with omissions but noincorrect entries 1. Answer nearly correct (II (b) (2)) the projectorwill proceed to remedial track X in direction specified for nearlycorrect answers.

2. Answer incorrect (II (b) (4)) or the acceptable number of omissionsis exceeded (II (b) (3)) the projector will proceed to a remedial trackX in a direction specified for incorrect answers.

b. Partially correct with either omissions or incorrect entries.

1. Number of allowable omissions and incorrect entries not exceeded theprojector will proceed to remedial track X in a direction specified fornearly correct answers.

2. Allowable number of errors exceeded the projector will proceed toremedial track X in a direction specified for incorrect answers.

3. Multiple remedial track mode a. Nearly correct answer (II (b) (2))the projector will proceed to remedial track X in a direction specifiedfor nearly correct answers.

b. No incorrect entry but acceptable number of omissions exceeded theprojector will proceed to remedial track X in a direction specified forincorrect answers.

0. Incorrect entries made the projector will proceed to a remedial trackdetermined by the following factors:

1. The group to which the first incorrect entry belongs as defined byTable I:

TABLE I INCORRECT ENTRY GROUPS Group I Group II Group III Group IV 2.The specified remedial track X as encoded on the control track of thefilm. 3. The operation according to the pair or quad track mode (see II(c) (3) (d) and (e) below). (1. Pair track mode 1. The remedialdirection is defined by the first incorrect entry. 2. The remedialchoices are the IN or OUT direction on each of two tracks. e. Quad trackmode 1. The remedial direction follows the specified incorrect answerdirection. 2. The remedial choices are the incorrect answer direction oneach of four tracks. III. LOGIC ASSIGNMENTS The complete logicassignments for the remedial track and direction suitable for both sixand 12 track systems are found in Table II.

5 IV. CONTROL CODES For both six and 12 track systems a total of 14binary TABLE II.REMEDIAL TRACK AND DIRECTION ASSIGNHENTSMULTIPLEREMEDIAL TRAC K MODE Quad mode Pair mode x3 it; Group k, k. TrackY y; y:yr yo Track Y y; yr yi yo Direction I 0 U 4 0 l 0 0 2 0 0 1 0 OUT 0 III) I I 0 l) 0 1 I 0 0 0 I OUT 0 III I 0 2 0 0 I 0 2 0 0 1 O IN. 0 IV 1 13 O i) 1 1 1 0 0 0 1 IN. 1 I 0 0 4 0 1 0 0 I 4 0 1 0 0 OUT. 1 II 0 1 5 O1 0 1 5 0 1 0 1 OUT. 1 III 1 0 6 O 1 1 0 4 0 1 O 0 IN. 1 IV 1 1 3 0 0 11 5 0 1 0 I IN. 0 I 0 0 12 1 1 0 0 1 O 1 0 OUT 0 II 0 1 9 1 0 0 1 9 1 00 1 OUT. 0 III 1 0 .10 1 0 1 O 10 1 0 1 0 IN. 0 IV 1 1 11 1 0 1 1 9 1 00 1 IN.

*In the Quad Mode, the remedial direction is either IN or OUT asspecified by BIT 2 (the incorrect answer direction bi control bits arerequired to perform the various opera- EYBOARD CODES tion as defined insection II above. These 14 binary control bits and their functions arelisted in Table III.

Table IV defines the code by which the various remedial operations inthe pattern mode are identified.

The alpha numeric keyboard as shown in FIG. 3 shows a five bit binarycode for each entry identification with the coding being performed inthe functional block 4 of FIG. 1. The keyboard code is defined in TableV along with various examples.

TABLE V.KEYBOARD CODE k: kn II:

Group In kg A/O E/4 I/B M Q V Z I 0 0 kn B/I. F/5 J/U N R W II 0 1 SeeTable I.

in (1/2 (iv/6 K O S X III 1 0 k D/B H]? L l T Y IV 1 1 k4 k3 k2 k1 k0Where: Examples k0=2 Ali)..." 0 O 0 O O ki=2 D/3 O O U l 1 2=2 k O 1 0 10 k =2 Z 1 I 0 O 0 k4=2 V I TABLE III.CON'IROL copes Bit AssignmentFunction BIT I 0 Symbolmode defined. I Pattern mode defined. 1 (IN)Remedial direction specified for incor- BI'I 2 rect answers. Used inboth symbol 0 (OUT) and pattern modes. BIT 3 2 Binary codes for a.certain decimal BIT t 2 Group N. number, used in coniunetion with BIT 52 BIT 7. In the entry-counting mode, BIT 6 2 Group N represents thecorrect number of entries, while in the allowable omission mode itrepresents the number of entry omissions allowed. BIT 7 1 Entry-countingmode defined 0 Allowable omission mode defined.

Used only in Pattern mode. 1 Multiple remedial track mode defined- BIT 8Used only in Pattern mode.

0 Single remedial track mode defined.

Used only in Pattern mode. B T 3 Multiple remedial control bit, used incp niunction with BIT B (see table 1 (IN) Remedial directionspecification for BIT 10 nearly correct answers. Used only in 0 (OUT)Pattern mode. BIT 11 2=Io.. Binary number specified lor remedial BIT 122 =1i Track X track assignments. The 2 bit is used B11 13 2 12. only inthe 12 track system. BIT 14 2 15- TABLE IV REMEDIAL MODE CODE Bit 8 Bit9 Remedial Mode 0 0 Single remedial track mode-- special case (II (b)(5)). 0 l Single remedial track mode. 1 Quad remedial track mode. I lPair remedial track mode.

FUNCTIONAL BLOCK DIAGRAM FIG. 4

FIG. 4 shows a more detailed functional block breakdown of the answerdetection logic, track and direction selection logic of the functionalblock 6 of FIG. 1. FIG. 4 will be discussed with reference to thepreviously defined operational modes and the relevant logic circuitsshown in FIGS. 5-10 respectively.

A. ENTRY COUNT/ENTRY OMISSION DETEC- TION LOGIC 1. Entry counting mode.

This mode of operation is defined by the BIT 7 being a binary ONE. TheBIT 7 is applied to a gate G1 thereby rendering the gate responsive tothe keyboard entry supplied as the other input thereto. The keyboardentry input supplies, for example, a binary ONE for each operation ofthe keyboard of FIG. 3. Hence, the gate G1 provides an output ONE foreach student entry to an OR logic circuit. A second gate G2 receives aBIT 7 input which blocks gate G2 from supplying an input to the OR logiccircuit.

In the entry counting mode of operation the output of the OR circuit isthus a series of binary ONEs corresponding to the number of studententries. The output of the OR is applied to a four BIT countdown counterC1. Stored in the countdown counter Cl is the binary numbercorresponding to the correct number of entries for the particular answerunder consideration. The correct number is supplied to the countdowncounter Cl from the group N BITS defined in Table III as the BITs 3, 4,S and 6. Accordingly, prior to a student entry the four bit countdowncounter Cl has stored therein a binary number corresponding to thecorrect number of entries of the answer. In response to each studententry the countdown counter C1 counts down by one count. If the studententers the correct number of character entries via the keyboard, at theend of this answer, when he depresses the ENTER/GO button, the countdowncounter CI will have counted down to a zero number, that is, a binaryZERO will appear at each of its four outputs to be applied to the entrycount/entry omission detection logic DLl.

If the correct number of student entries has been entered correspondingto the output of the countdown counter Cl being all ZEROs the detectionlogic DLI will provide a binary ONE output at the output Dl thereof.However, if an incorrect number of student entries had been made withthe countdown counter Cl having an output different than all ZEROs, theoutput D1 of the detection logic DLI would be a ZERO. The output D1 isdefined herein as CORR NUMBER ENTRY. Thus, if CORR NUMBER ENTRY is a ONEthis defines the correct number of entries by the student and if a ZEROthis defines an incorrect number of student entries. The entry countingmode may be employed in both the SYMBOL and the PATTERN modes ofoperation.

2. Allowable omission mode.

This mode of operation is established by BIT 7 being a ZERO (see TableIII). However, this mode may be used only in the PATTERN mode ofoperation. With the BIT 7 being a ZERO, BIT 7 input to the gate G2permits this gate to output the other input thereto, namely, the omittedentry input, to the OR circuit. The omitted entry input is supplied fromthe functional block 2 of FIG. 1. As fully discussed in the above citedcopending application, when operative in the PAT- TERN mode, if nocorrect entries have been omitted, the omitted entry will be all binaryZEROs. If however, one or more correct entries have been omitted, thiswill produce a binary ONE output corresponding thereto. Thus, the inputsupplied to the countdown counter C1 will correspond to the number ofomitted entries made by the student in response to a particularquestion.

With the allowable omission mode being defined, the group N bitsinputted to the four bit countdown counter C1 will indicate the numberof allowable entry omissions. For each omitted entry input the countdowncounter C1 will count down by ONE. After the student has entered hiscomplete answer the detection logic DL2 supplies the following outputs:

D2 ONE if one or more correct entries omitted.

D2 ZERO if all correct entries entered.

D3 ONE if the number of allowable not exceeded.

D3 ZERO if the allowable number of omissions exceeded.

The outputs D1, D2 and D3 of the correct number of entry/omissiondetection logic DLl is employed within the system of FIG. 4 as will bedescribed in further detail.

B. INCORRECT ENTRY MEMORY LOGIC Incorrect entries for the PATTERNanswering mode are generated in the functional block 2 and in the SYMBOLmode are generated at the output of the comparator 5 as described in theabove cited copending application. In FIG. 4 the incorrect entry in boththe SYMBOL and PATTERN mode in a mutually exclusive manner are appliedto a logic gate G3 along with various control BlTs. The outputs of theincorrect memory ML are INCOR ENTRY (which is a ONE if there is anincorrect entry and a ZERO if no incorrect entries) and the complementthereof INCOR ENTRY. The output of the gate G3 is applied to anincorrect entry memory logic ML which is operative to store therein anyincorrect entry made.

FIG. 5 shows a breakdown of the logic gate G3 and the memory logic ML.The incorrect entry memory circuit of FIG. 5 is operative to store in aJR flip-flop FFI there of that an incorrect entry has been made. In alloperational modes except the special case (defined at II (b) (5) in theoutline above). Accordingly, in the defined special case," a NAND N1 ofFIG. 5 is blocked by a ZERO input being provided thereto from an N2which receives the inputs BIT 8 and BIT 9. In the single remedial trackmode special case, the BITs 8 and 9 as defined in Table IV are bothZEROs. In all other modes of operation (as shown by Table IV) the NANDN2 will output a ONE to the NAND N1 so as to enable this gate. The otherinputs to the NAND N1 are the BIT 1, which when in the PATTERN mode is aONE and when in the SYMBOL mode is a ZERO and also the incorrect entryfor the PATTERN mode. Therefore, in all but the special case, specifiedabove, the NAND NI will output a ZERO for each incorrect entry. A NANDgate N3 receives BIT 1 as one input and the incorrect entry in theSYMBOL mode as the other entry. Accordingly, in the SYMBOL mode ofoperation, for each incorrect entry the NAND N3 will output a ZERO.Since BIT l is a ONE during the SYM- BOL mode there will be thusprovided, a ONE for each incorrect entry in either the PATTERN or SYMBOLmode which will be stored in the JK flip-flop FFII. The flip-flop FBIhas two outputs: INCOR ENTRY and INCOR ENTRY, with the INCOR ENTRY beingdefined as a ONE if an incorrect entry is made or a ZERO if no incorrectmade or incorrect entries ignored. In the special case when the NANDgate N1 is disabled every incorrect entry will be treated as an omittedcorrect entry, which will be taken into count in detection logic DLI asdiscussed in A above.

C. MULTIPLE REMEDIAL TRACK NUMBER (TRACK Y) GENERATING LOGIC In FIG. 4the multiple remedial track number generating logic GL is shown whichreceives the INCOR ENTRY from the incorrect entry memory ML as a ONE ifincorrect entries or a ZERO if no incorrect entries. The multipleremedial track number generating logic GL functions on the basis of therules established in Section II (c) (3) C (see also Tables I, II and V)above wherein a group of binary bits designated herein as track Y aregenerated. The generating logic GL receives BIT B and BIT 9 for-definingthe multiple remedial track mode according to Table IV; the two leastsignificant bits k, and k of the student entry from the coder 4 of FIG.11 of the first incorrect student entry; INCOR ENTRY; and the higher thebit x for the six track system and the bits x and x for the 12 tracksystem as provided on the control track of the film as BIT 13 and BIT1141. The output of the multiple remedial tracks number generating logicGL are the four bits y y y, and y defining the Y track and also anoutput k FIG. 6 shows the detailed logic circuitry for the generatinglogic GL. This logic diagram will be discussed with reference to thelogical equations defining the generation of each of the bits y y, y,and y; of the Y track output.

(1) y bit generation The equation:

y 1 0 (I) defines the generation of the first bit y both the pair (II(3) (c) a) and the quad (II (c) (3) b) modes. The asterisk indicatesthat the logic state of the k and k bits have to be stored in flip-flopsFFk and FFk of FIG. 6.

The bit k is applied as an input to a NAND N5 and the bit k is appliedto NAND N6. The other two inputs to both NANDS N5 and N6 are the outputfrom the NAND N4 of FIG. 5 and the INCOR ENTRY output of the flip-flopFFl of FIG. 5. When an incorrect entry is made by the student the firstbit k will be stored in the flip-flop FFk comprising NAND gates N7 andN8 to provide a stored output k and the complement W thereof. Similarlythe second bit k will be stored in the flip-flop Fl k which includesNANDS N9 and N10 to provide the stored second bit output k,* and thecomplement k,*. The output of the NAND N7 defines the bit k thusestablishes directly the first bit y of the track Y output in both thequad and pair modes.

(2) y bit generation The logical equation in the pair mode for thegeneration of the y bit is:

In the quad mode the logical equation is:

The overall equation may then be defined as:

fi I, PAIR+k,* -QUAD 2 where,

PAIR BIT 8'BIT 9 receives the PAIR output of the NAND N11. The otherinput of the NAND N14 is the EFoutput of the NAND N8. The output of theNAND N14 is applied to a NAND N16. The other input to the NAND N16 isthe output of a NAND N17 which receives the k,* output of the NAND N9and a QUAD output which would be a ZERO in the pair mode.

Accordingly, the output of the NAND N16 satisfies the equation (2) inthe pair mode so that the second bit y W Z PAIR as required for the pairmode of operation.

In the quad mode of operation BIT 8 is a ONE and BIT 9 is a ZERO. Thusin this mode of operation a NAND N17 receiving inputs BIT 8 and BIT 9supplies its output to a NAND gate N18 which in response theretoprovides the QUAD output. The QUAD output is applied to the NAND N17which supplies the input to the NAND N16 for generating the y bit.Accordingly, in the quad mode of operation the equation y k QUAD issatisfied, with the other input to the NAND gate N17 being k,*.

(3) y, bit generation In the pair mode the y bit is defined by theequation y x In the quad mode the logic equation is:

v yz o 1 o* 1*' 2 The overall equation for defining the y bit is:

y =x -PAIR 1? 127 k k,*] ":0 QUAD In the pair mode, a ZERO quad outputis applied to a NAND N19 so that the NAND N19 supplies a ONE input to aNAND N20 whose output defines the y bit. The other input to the NAND N20is from the NAND N13 which receives the x input. The output of the NANDN20 is thus equal to x; to satisfy the logical equation y x in the pairmode.

In the quad mode the term H kR-QUAD is provided via the NAND N19 to theNAND N20. The term x '11:? FF is provided via the NAND gates N12 andN13. Thus the logical output of the NAND N20 in the quad mode satisfiesthe logical equation for the y, bit.

(4) y, bit generation for n greater or equal to 3 The logical equationdefining the y bit is:

y (5) where, x is the nth bit in the X track code which is used only insystems where the number of tracks exceeds seven.

Table II defines the four track Y bits for the various k k, and x xinputs. Note that the Ic k bits are determined by the Groups I, II, IIIor IV as set forth in Table I as the incorrect entry groups.

D. CORRECT/INCORRECT ANSWER DETECTION LOGIC In FIG. 4 thecorrect/incorrect answer detection logic DL2 is operative to determinewhether an answer is completely correct according to the followingcriteria:

I. no incorrect entry has been made, and

2. no correct entry has been omitted, (allowable omission mode, BIT 7ZERO), or the correct number of entries has been entered (entry countingmode, BIT 7 ONE). The correct/incorrect answer detecting logic DL2 thusreceives as inputs the CORR NUMBER ENTRY D1 and the OMISSION entry D2both from the correct number of entries/entry omission detection logicDLl; the INCOR ENTRY from incorrect entry memory ML and the BIT 7 andBIT 7. In response to these entries are provided the correct answeroutput CORR ANS and the complement thereof CORR ANS.

The logic equation which must be satisfied by the correct/incorrectanswer detection logic DL2 is:

= ONE if correct number of entries entered.

= ZERO if incorrect number of entries entered.

I FIG. 7 shows a practical implementation of the correct/incorrectanswer detecting logic DL2. In FIG. 7 the omission entry D2 is appliedthrough an inverting NAND N21 as one input to a NAND N22. The otherinputs to the NAND N22 are INCOR ENTRY and BLT 7. The output of the NANDN22 is applied to a NAND N23. The CORR NUMBER ENTRY is applied to a NANDN24 which also receives BIT 7 and INCOR ENTRY with the output of theNAND N24 being applied at the other input to the NAND N23. The output ofthe NAND N23 defines the CORR ANSWER output which will be a ONE if theanswer is correct and a ZERO is incorrect. The output of the NAND N23 isalso inverted in a NAND N25 to supply the complementary output CORR ANS.

E. NEARLY CORRECT ANSWER DECISION LOGIC The nearly correct answerdecision logic- DL3 of FIG. 4 must satisfy the following criteria fordefining a nearly correct answer:

1. In the pattern mode, the allowable omission mode has been defined.

2. No incorrect entry has been made including the special case that theincorrect entries have been ignored (see II (b) (5) and B above).

3. Some correct entries have been omitted but the total number ofomissions is acceptable.

The nearly correct answer logic DL3 must solve the following logicequation:

NEARLY CORR ANS BIT l-BIT 7 INCOR ENTRY OMISSION ACCEPT OMISSION (7)where, ACCEPT OMISSION ONE if the number of allowable omissions notexceeded,

= ZERO if the allowable number of emissions exceeded. As shown in FIG. 4the inputs to the nearly correct answer decision logic DL3 are theACCEPT OMIS- SION D3, OMISSION D2, INCOR ENTRY from the incorrect entrymemory ML and BIT l and BIT 7. In response to these inputs the outputsNEARLY CORR ANS and NEARLY CORR ANS.

The implementation for the narly correct answer decision logic DL3 isshown in FIG. 8. All of the described inputs are applied to a NAND N26which satisfies the complement of equation (7) above to provide theoutput NEARLY CORR ANS. By inverting the output of the NAND N26 in aNAND N27, the

NEARLY CORR ANS output is provided which is a binary ONE if nearlycorrect and a binary ZERO is either a. Use BIT 2 (see Table III) for allmodes except pair remedial track mode (II (c) (3) d).

b. Use k (see FIG. 6) for pair remedial track mode only. (k ONE, INdirection; k,* ZERO, OUT direction).

The remedial direction selection logic SL1 receives the inputs asdefined on FIG. 4 to provide the selected direction IN or OUT output.The remedial direction selection logic SL1 is operative to satisfy thefollowing logic equations for the respective IN and OUT directions:

IN BIT 2 (INCOR ANS DIR) +BIT 10' (NEARLY CORR ANS) k,* (PAIR DIR) (8)OUT BIT 2 (INCOR ANS DIR) BIT 10' (NEARLY CORR ANS) +k (PAIR DIR) (9)where INCOR ANS DIR CORRECT ANS PAIR DIR NEARLY CORR ANS (10) PAIR DIR(INCOR ENTRY) BIT 1 PAIR (11) FIG. 9 shows a practical implementationfor forming the above function as defined in equations (8) and (9). InFIG. 9 the incorrect answer direction (INCOR ANS DIR) is provided asfollows. CORRECT ANS and NEARLY CORR ANS inputs are provided to a NANDN29. The PAIR DIR input is applied to the NAND N29 from a NAND N30. TheNAND N30 receives as inputs: INCOR ENTRY, BIT 1 and PAIR (see FIG. 6).The output of the NAND N29 is inverted in a NAND 31, whose outputsatisfies the conditions of equation (10) to provide INCOR ANS DIR.

If the pair mode of operation is desired the output of the NAND N30 willblock the NAND N29. The output of a NAND N32 which receives the PAIR DIRas an input will thus satisfy equation (11) and provide the PAIR DIRoutput.

The output of NAND N31 is applied to a NAND N33 which receives at itsother input BIT 2. The output of NAND N32 is applied to a NAND N34 whichreceives as its other input Both of the outputs of the NANDs N33 and N34are applied to a NAND N35 of a flipflop FF3 which includes a NAND N36.The NEARLY CORR ANSWER input is applied to a NAND N37 and a NAND N38.The NANDS N37 and N38 have as their other inputs BIT l0 and BIT 10,respectively. The output of NAND N37 is applied to the NAND N35 and theoutput of NAND N38 is applied to the NAND N36. As defined in Table IIIwhen the BIT 10 is ONE this defines the IN direction and when the BIT 10is a ZERO this defines the OUT direction in for nearly correct answers.

The INCOR ANS DIR output of the NAND N31 is also applied to a NAND N39which also receives BIT 2 as the other input thereto. The PAIR DIRoutput of the NAND N32 is applied to a NAND N40 which receives as itsother input the k,* input. The outputs of the NANDs N39 and N40 are bothapplied to the NAND N36.

If any of the four inputs to the NAND N35 of the flipflop FF3 is a ZERO,the output thereof will be a ONE defining the OUT direction. Conversely,if all of the inputs to NAND N35 should be a ONE the output will be aZERO defining the IN direction. The logical equations defining the INand OUT directions are set forth above as equations (8) and (9),respectively. G. REMEDIAL TRACK SELECTION LOGIC In FIG. 4 remedial trackselection logic SL2 is provided for determining whether a remedial trackis to be selected and whether track X or track Y information is to beused. The output of the remedial track selection logic SL2 is a mutuallyexclusive output either GO TRACK X or G TRACK Y. The G0 TRACK Y outputis only used in the pattern multiple remedial track mode (11 (c) (3))when one or more incorrect entries are made.

The remedial track selection logic operates on the following factors:

1. Completely correct answer. The track number remains the same as inthe preceding teaching sequence.

2. Conditions under which another track X will be selected.

a. Symbol mode answer incorrect (I (c)).

b. Pattern-single remedial track mode incorrect answer (II (b) (4)).

c. Pattern-multiple remedial track mode answer nearly correct (II (b)(2)).

d. Pattern-multiple remedial track mode no incorrect entries butallowable number of omissions exceeded (II (b) (3)).

The logic equation according to the above described factors is:

GO TRACK X =BIT l (CORR ANS) +BIT l [BIT 8 CORR ANS BIT 8 (NEARLY CORRANS ACCEPT OMISSION INCOR ENTRY)] CORR mS-(BlTl 'BIT8)+BIT1-BIT8-BIT7'OMISSION -INCOR ENTRY (l2) The logical equation for selection of track Ywhich is used only in the pattern-multiple remedial track mode when oneor more incorrect entries are made is:

G0 TRACK Y BIT l BIT 8 INCOR ENTRY l 3) A logic circuit for satisfyingthe equations (12) and (13) is shown in FIG. 10. In the symbol mode ofoperation BIT l is a ZERO; therefore, a NAND N41 of FIG. will supply aONE output to a NAND N42 which receives CORR ANS as the other inputthereto. The output of the NAND N42 is applied to a NAND N43 whichreceives its other input from a NAND N44. The output of the NAND N41 isalso applied to a NAND N45 which therefore provides a logical output BITl 'BIT 8. In the symbol mode the NAND N44 will thus receive a ZERO inputso that the NAND N44 will supply a ONE input to the NAND N43.Accordingly, when an incorrect answer appears, a ONE will be providedfrom the NAND N43 as the GO track X output. The output of the NAND N45is also applied to a NAND N46 which receives as its other input INCORENTRY so that in the symbol made a ONE output is supplied therefrom to aNAND N47 which outputs a ZERO as the GO track Y output.

In the pattern mode BIT l is a binary ONE thereby unblocking the NANDN41. The other inputs to the NAND N44 are BIT 7, OMISSION and INCORENTRY. In the single remedial track mode the NAND N46 is blocked by theapplication of a ZERO input thereto from BIT 8 so that the GO track Youtput is a ZERO. However, in the multiple remedial track mode wheneveran INCOR ENTRY is received by the NAND N46, NAND N47 will supply a ONEoutput defining the GO track Y condition. The G0 track Y output definingthe GO track Y from the NAND N43 will be a ZERO, however, since bothinputs under the defined conditions will be ONEs.

In pattern multipIe remedial track mode when one or more omissions occurthe OMISSION input to the NAND N44 will be a ONE as will be the otherinputs thereto. Thus NAND N44 will supply a ZERO output to NAND N43causing a ONE GO track X output to be provided.

SUMMARY In summary the present remedial branching type of teachingsystem is capable of operation in a plurality of modes permittinginterpretation of student entries as correct, incorrect, nearly correctand others according to predefined codes. In response to student entry,moreover, the particular track primary or remedial to be presented tothe student as the next searching sequence is selected as is the primaryor remedial direction of presentation of that track. The logicalconfigurations employed herein additionally, provide for 7 highlyeconomic use of the control codes.

What is claimed is: 1. In a system for evaluating the accuracy of aconstructed response and providing remedial information as a function ofthe relative accuracy of the constructed response, the combination of,

first means for storing individual segments of primary information,requests for a constructed response associated with said primaryinformation, correct answer information associated with each request fora constructed response, and a plurality of segments of secondaryinformation, second means operatively connected to said first means forreproducing said primary information and associated request for aconstructed response,

third means operatively connected to said first means for storing indigital form said correct answer information,

fourth means for providing a constructed response to said request forconstructed response reproduced by said second means, said fourth meansincluding a plurality of actuator means, the operation of each actuatormeans producing a digital output signal,

fifth means operatively connected to said third and fourth means forcomparing the constructed response developed by the operation of saidfourth means in response to said request for constructed responsereproduced by said second means with the correct answer informationstored in said third means, said fifth means producing a first outputmeans and a second output signal of said fifth means to provideselective reproduction by said second means of secondary informationdetermined by the digital output signal developed by a selected actuatormeans, the digital output signal functioning to address preselectedsecondary information related to said actuator means, said sixth meansresponding to the presence of a first output signal from said fifthmeans by causing a subsequent segment of primary information and acorresponding request for constructed response to be reproduced by saidsecond means and the corresponding correct answer information to bestored in digital form in said third means and further wherein saidsecondary information comprises segments of remedial information, saiddigital output signal produced by the operation of an actuator meansbeing a multi-bit digital word, said multi-bit digital word addressingpredetermined segment or segments of said secondary information forreproduction by said second means in the event said multi-bit digitalword results in the generation of a second output signal by said fifthmeans.

2. In a system as claimed in claim 1 wherein said first means includes amulti-track media.

3. In a system as claimed in claim 1 wherein said seg- 4. In a system asclaimed in claim 1 wherein said constructed response is formed by theoperation of more than one of said actuator means.

5. In a system for evaluating the accuracy of a constructed response,the combination of,

first means for storing individual segments of primary information,requests for constructed response associated with said primaryinformation, correct answer information comprised of a plurality ofcorrect answers associated with each request for a constructed response,

second means operatively connected to said first means for reproducingsaid primary information and associated request for a constructedresponse,

third means operatively connected to said first means for storing indigital form said correct answer information,

fourth means for providing a constructed response to said request forconstructed response reproduced by said second means, said fourth meansincluding a plurality of actuator means, the operation of each actuatormeans producing a digital input entry,

fifth means adapted to operate in an allowable omission mode includingsixth means for establishing a predetermined number of permissibleomitted input entries and seventh means for comparing the number ofinput entries omitted from the correct 6 number of entries in saidsecond means 'with said predetermined number of permissible omittedinput entries, and providing an acceptable omission indication thatlessor more than a permissible 65 number of omitted entries have beenentered.

6. The combination of claim 5 wherein:

said fifth means includes nearly correct answer detection meansresponsive to said acceptable omission indication and an incorrect entryindication indicative of whether an incorrect or no incorrect entry hasbeen included in said input entries to provide a nearly correct answerindication when the acceptable number of omissions has not been exceededand no incorrect entries have been made.

7. The combination of claim 5 wherein said fifth means is operativelyconnected to said first means and is adapted to operate in an entrycounting mode and said allowable omission mode wherein:

said fifth means includes means for comparing the number of entriesincluded in said input entries with the correct number of entries andproviding a correct entry number indication that a correct or incorrectnumber of entries has been made when operative in said entry countingmode, and for comparing the number of entries omitted from the correctnumber of entries with the predetermined number of permissible omittedentries and providing an acceptable omission indication that less ormore than a permissible number of omitted entries has been made whenoperative in said allowable omission mode,

correct/incorrect answer detecting means responsive to said correctentry number indication and an incorrect entry indication indicative ofwhether an incorrect entry or no incorrect entry has been included insaid input entries to provide a correct answer indication in responsethereto when the correct number of entries has been entered and noincorrect entries have been entered when operative in the entry countingmode,

nearly correct detection means responsive to said acceptable omissionindication and an incorrect entry indication indicative of whether anincorrect entry or no incorrect entry has been included in said inputentries to provide a nearly correct answer indication when theacceptable number of omissions has not been exceeded and no incorrectentry has been made when operative in said acceptable omission mode.

8. The combination of claim 7 wherein said first means includes remedialinformation.

9. The combination of claim 8 wherein said first means includes controlinformation for determining the mode of operation of the system and forestablishing said predetermined number of permissible omitted inputentries.

10. The combination of claim 9 wherein said first means includes amulti-track media for storing said primary information, requests forconstructed response, correct answer information, remedial information,and said control information.

1 1. The combination of claim 10 wherein:

said fifth means includes track selection means and direction selectionmeans responsive to said correct answer indication and said nearlycorrect answer indication for respectively selecting a primary orremedial track of said multi-track media and the primary or remedialdirection of operation thereof according to the mode of operationdefined in said system.

12. The combination of claim 11 wherein:

the information included on said multi-track media defines thefollowing:

1. the answer mode as either commutative or noncommutative,

2. the remedial direction for incorrect input entries in either saidcommutative or non-commutative modes,

3. the correct number of entries when operative in said entry countingmode or the allowable number of omissions in said input entries that canbe omitted in said allowable omission mode,

4. the entry counting mode or the allowable omission mode,

5. a multiple remedial track mode wherein one of several tracks may bedesignated as said remedial tracks or a single remedial track modewherein only one track may be designated said remedial track,

6. said remedial direction for nearly correct answers, and

7. the remedial track;

wherein said fifth means is responsive to said control information.

13. The combination of claim 8 wherein:

said fifth means includes means for selecting remedial information forreproduction by said second means in response to the first incorrectentry in said input entries.

14. The combination of claim 13 wherein each input entry is a multi-bitdigital word, said multi-bit digital word functioning to select remedialinformation for reproduction by said second means.

15. In a system for evaluating the accuracy of a constructed response,the combination of, v

first means for storing individual segments of primary information,requests for constructed response associated with said primaryinformation, correct answer information comprised of a plurality ofcorrect answers associated with each request for a constructed response,second means operatively connected to said first means for reproducingsaid primary information and associated request for a constructedresponse, third means operatively connected to said first means forstoring in digital form said correct answer information, fourth meansfor providing a constructed response to said request for constructedresponse reproduced by said second means, said fourth means including aplurality of actuator means, the operation of each actuator meansproducing a digital input entry, fifth means operatively connected tosaid third and fourth means for comparing the constructed responsedeveloped by the operation of said fourth means in response to saidrequest for constructed response reproduced by said second means withthe correct answer information stored in said third means to determinethe number of correct input entries, sixth means adapted to operate inan allowable omission mode-including seventh means for establishing aminimum number of correct input entries and eighth means for comparingthe number of correct input entries with said minimum number of correctinput entries, and providing an acceptable omission indication that lessor more than said minimum number of correct input entries have beenentered.

1. In a system for evaluating the accuracy of a constructed response andproviding remedial information as a function of the relative accuracy ofthe constructed response, the combination of, first means for storingindividual segments of primary information, requests for a constructedresponse associated with said primary information, correct answerinformation associated with each request for a constructed response, anda plurality of segments of secondary information, second meansoperatively connected to said first means for reproducing said primaryinformation and associated request for a constructed response, thirdmeans operatively connected to said first means for storing in digitalform said correct answer information, fourth means for providing aconstructed response to said request for constructed response reproducedby said second means, said fourth means including a plurality ofactuator means, the operation of each actuator means producing a digitaloutput signal, fifth means operatively connected to said third andFourth means for comparing the constructed response developed by theoperation of said fourth means in response to said request forconstructed response reproduced by said second means with the correctanswer information stored in said third means, said fifth meansproducing a first output signal when said constructed responsecorresponds to said correct answer information, said first output signalindicative of a correct constructed response, said fifth means producinga second output signal indicative of an incorrect constructed responsein the event the said constructed response does not correspond to saidcorrect answer information, sixth means operatively connected to saidfirst means and responding to the output signals of said fourth meansand a second output signal of said fifth means to provide selectivereproduction by said second means of secondary information determined bythe digital output signal developed by a selected actuator means, thedigital output signal functioning to address preselected secondaryinformation related to said actuator means, said sixth means respondingto the presence of a first output signal from said fifth means bycausing a subsequent segment of primary information and a correspondingrequest for constructed response to be reproduced by said second meansand the corresponding correct answer information to be stored in digitalform in said third means and further wherein said secondary informationcomprises segments of remedial information, said digital output signalproduced by the operation of an actuator means being a multi-bit digitalword, said multi-bit digital word addressing predetermined segment orsegments of said secondary information for reproduction by said secondmeans in the event said multi-bit digital word results in the generationof a second output signal by said fifth means.
 1. the answer mode aseither commutative or non-commutative,
 1. In a system for evaluating theaccuracy of a constructed response and providing remedial information asa function of the relative accuracy of the constructed response, thecombination of, first means for storing individual segments of primaryinformation, requests for a constructed response associated with saidprimary information, correct answer information associated with eachrequest for a constructed response, and a plurality of segments ofsecondary information, second means operatively connected to said firstmeans for reproducing said primary information and associated requestfor a constructed response, third means operatively connected to saidfirst means for storing in digital form said correct answer information,fourth means for providing a constructed response to said request forconstructed response reproduced by said second means, said fourth meansincluding a plurality of actuator means, the operation of each actuatormeans producing a digital output signal, fifth means operativelyconnected to said third and Fourth means for comparing the constructedresponse developed by the operation of said fourth means in response tosaid request for constructed response reproduced by said second meanswith the correct answer information stored in said third means, saidfifth means producing a first output signal when said constructedresponse corresponds to said correct answer information, said firstoutput signal indicative of a correct constructed response, said fifthmeans producing a second output signal indicative of an incorrectconstructed response in the event the said constructed response does notcorrespond to said correct answer information, sixth means operativelyconnected to said first means and responding to the output signals ofsaid fourth means and a second output signal of said fifth means toprovide selective reproduction by said second means of secondaryinformation determined by the digital output signal developed by aselected actuator means, the digital output signal functioning toaddress preselected secondary information related to said actuatormeans, said sixth means responding to the presence of a first outputsignal from said fifth means by causing a subsequent segment of primaryinformation and a corresponding request for constructed response to bereproduced by said second means and the corresponding correct answerinformation to be stored in digital form in said third means and furtherwherein said secondary information comprises segments of remedialinformation, said digital output signal produced by the operation of anactuator means being a multi-bit digital word, said multi-bit digitalword addressing predetermined segment or segments of said secondaryinformation for reproduction by said second means in the event saidmulti-bit digital word results in the generation of a second outputsignal by said fifth means.
 2. In a system as claimed in claim 1 whereinsaid first means includes a multi-track media.
 2. the remedial directionfor incorrect input entries in either said commutative ornon-commutative modes,
 3. the correct number of entries when operativein said entry counting mode or the allowable number of omissions in saidinput entries that can be omitted in said allowable omission mode,
 3. Ina system as claimed in claim 1 wherein said segments of remedialinformation are arranged to form at least three separate remedialresponses, each multi-bit digital word addressing one of said remedialresponses.
 4. In a system as claimed in claim 1 wherein said constructedresponse is formed by the operation of more than one of said actuatormeans.
 4. the entry counting mode or the allowable omission mode,
 5. amultiple remedial track mode wherein one of several tracks may bedesignated as said remedial tracks or a single remedial track modewherein only one track may be designated said remedial track,
 5. In asystem for evaluating the accuracy of a constructed response, thecombination of, first means for storing individual segments of primaryinformation, requests for constructed response associated with saidprimary information, correct answer information comprised of a pluralityof correct answers associated with each request for a constructedresponse, second means operatively connected to said first means forreproducing said primary information and associated request for aconstructed response, third means operatively connected to said firstmeans for storing in digital form said correct answer information,fourth means for providing a constructed response to said request forconstructed response reproduced by said second means, said fourth meansincluding a plurality of actuator means, the operation of each actuatormeans producing a digital input entry, fifth means adapted to operate inan allowable omission mode including sixth means for establishing apredetermined number of permissible omitted input entries and seventhmeans for comparing the number of input entries omitted from the correctnumber of entries in said second means with said predetermined number ofpermissible omitted input entries, and providing an acceptable omissionindication that less or more than a permissible number of omittedentries have been entered.
 6. The combination of claim 5 wherein: saidfifth means includes nearly correct answer detection means responsive tosaid acceptable omission indication and an incorrect entry indicationindicative of whether an incorrect or no incorrect entry has beenincluded in said input entries to provide a nearly correct answerindication when the acceptable number of omissions has not been exceededand no incorrect entries have been made.
 6. said remedial direction fornearly correct answers, and
 7. the remedial track; wherein said fifthmeans is responsive to said control information.
 7. The combination ofclaim 5 wherein said fifth means is operatively connected to said firstmeans and is adapted to operate in an entry counting mode and saidallowable omission mode wherein: said fifth means includes means forcomparing the number of entries included in said input entries with thecorrect number of entries and providing a correct entry numberindication that a correct or incorrect number of entries has been madewhen operative in said entry counting mode, and for comparing the numberof entries omitted from the correct number of entries with thepredetermined number of permissible omitted entries and providing anacceptable omission indication that less or more than a permissiblenumber of omitted entries has been made when operative in said allowableomission mode, correct/incorrect answer detecting means responsive tosaid correct entry number indication and an incorrect entry indicationindicative of whether an incorrect entry or no incorrect entry has beenincluded in said input entries to provide a correct answer indication inresponse thereto when the correct number of entries has been entered andno incorrect entries have been entered when operative in the entrycounting mode, nearly correct detection means responsive to saidacceptable omission indication and an incorrect entry indicationindicative of whether an incorrect entry or no incorrect entry has beenincluded in said input entries to provide a nearly correct answerindication when the acceptable number of omissions has not been exceededand no incorrect entry has been made when operative in said acceptableomission mode.
 8. The combination of claim 7 wherein said first meansincludes remedial information.
 9. The combination of claim 8 whereinsaid first means includes control information for determining the modeof operation of the system and for establishing said predeterminednumber of permissible omitted input entries.
 10. The combination ofclaim 9 wherein said first means includes a multi-track media forstoring said primary information, requests for constructed response,correct answer information, remedial information, and said controlinformation.
 11. The combination of claim 10 wherein: said fifth meansincludes track selection means and direction selection means responsiveto said correct answer indication and said nearly correct answerindication for respectively selecting a primary or remedial track ofsaid multi-track media and the primary or remedial direction ofoperation thereof according to the mode of operation defined in saidsystem.
 12. The combination of claim 11 wherein: the informationincluded on said multi-track media defines the following:
 13. Thecombination of claim 8 wherein: said fifth means includes means forselecting remedial information for reproduction by said second means inresponse to the first incorrect entry in said input entries.
 14. Thecombination of claim 13 wherein each input entry is a multi-bit digitalword, said multi-bit digital Word functioning to select remedialinformation for reproduction by said second means.